Implementation of Digital Filters of FIR Type in FPGA
Authors: Jesús Antonio Álvarez Cedillo, Klauss Michael Lindig Bos, Gustavo Martínez Romero
Polibits, 37, pp. 83-88, 2008.
Abstract: This paper presents the description of development of digital filter of FIR type with eight bits data transmission. This system was implemented in FPGA (SPARTAN 3E by XILINX) and includes the software for calculation of filter coefficients and hardware reconfiguration. The experiments were conducted using simulation in MATHLAB.
Keywords: Digital filter; digital signal processing; FPGA; VHDL; FIR
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